A computer system typically includes a main processor coupled to a memory (e.g., a dynamic random access memory (DRAM)) via a memory controller. More particularly, one conventional computer system today may include a processor coupled to a double data rate (DDR) memory (e.g., synchronous dynamic random access memory (SDRAM)) via a DDR memory interface, such as a DDR link.
DDR memory is cheaper than other memory available today, such as extreme data rate (XDR) memory, and has a higher storage capacity than other memory. For example, XDR memory is limited in the amount of memory capacity it can support, and is more expensive than DDR2 or DDR3 memory. However, the DDR link may be slower than other links, such as an extreme input/output (XIO) link (or more generally an XDR interface). A width of the DDR link may be increased (e.g., to 288 bits) to increase the bandwidth thereof. However, this may result in the DDR link consuming too large a number of processor pins when used to couple DDR memory thereto. By requiring that the processor include a large number of pins, use of the DDR link can result in an increase in size of the processor, as well as of the cost associated therewith.
Another conventional computer system may include a processor coupled to an XDR memory via a memory interface, such as an XIO link. As described above, XDR memory is more expensive and has less storage capacity than DDR memory. However, the XIO link is a fast, narrow link (e.g., 72 bits wide). Therefore, the XIO link consumes fewer pins on a processor when used to couple memory thereto, i.e., compared with a DDR link. Consequently, use of an XIO link may enable the size of the processor and cost associated therewith to be reduced.
Thus, use of a DDR link coupled to a processor may cause an increase in the size of the processor and cost associated therewith, while use of XDR memory coupled to the processor may be more expensive and have less storage capacity than other memory options. Accordingly, improved methods, apparatuses and systems for interfacing a processor and a memory are needed.